Smartmatrix ESP32-S2 support?

Hi

I was wondering if the Smartmatrix library does support the “new” ESP32-S2?
Unfortunately the example sketch of the ESP32 does not compile with the ESP32-S2 selected.
The reason is, that the ESP32-S2 does not have the MCPWM-Functionality anymore.
Is there a workaround for this missing module?
Is it planned to support the ESP32-S2 in future?

Florian

Hi, I don’t plan to support the ESP32-S2, but it may happen at some point.

I took out the MCPWM code at some point, but looks like the headers are still included. Make sure you’re using the latest code on the teensy4 branch, and try taking out any mcpwm header and see if it works. Let me know!

Hi Louis

Thank you for the quick response! I’ve made some progress today. Now I can successfully compile the sketch, due to some changes in the library.

First of all, I had to change and add/remove some #include -paths for the ESP32-S2:

SmartMatrixMultiplexedRefreshESP32_Impl.h:
// #include "driver/mcpwm.h"
// #include "soc/mcpwm_reg.h"
// #include "soc/mcpwm_struct.h"
#include "esp32/rom/lldesc.h" // instead of "rom/lldesc.h"

SmartMatrixMultiplexedRefreshESP32_NT_Impl.h:
// #include "driver/mcpwm.h"
// #include "soc/mcpwm_reg.h"
// #include "soc/mcpwm_struct.h"
#include "esp32/rom/lldesc.h" // instead of "rom/lldesc.h"

MatrixHardware_ESP32_V0.h:
#include "../../../include/soc/include/hal/gpio_types.h" // added for ESP32-S2

Secondly, I changed the pinout for the ESP32-S2:

MatrixHardware_ESP32_V0.h:
#define R1_PIN GPIO_NUM_2
#define G1_PIN GPIO_NUM_15
#define B1_PIN GPIO_NUM_4
#define R2_PIN GPIO_NUM_16
#define G2_PIN GPIO_NUM_13
#define B2_PIN GPIO_NUM_17
#define A_PIN GPIO_NUM_5
#define B_PIN GPIO_NUM_18
#define C_PIN GPIO_NUM_19
#define D_PIN GPIO_NUM_21
#define E_PIN GPIO_NUM_12
#define LAT_PIN GPIO_NUM_26
#define OE_PIN GPIO_NUM_20
#define CLK_PIN GPIO_NUM_14
The following GPIOs are missing on the ESP32-S2: 22, 23, 24, 25, 27, 28, 29, 30, 31, 32

Then I realized, that the ESP32-S2 has only one I2S interface instead of two (like the ESP32).
I’ve seen that the SmartMatrix Library uses the I2S1-Interface (although they both should behave similarly?). Therefore, I had to change all I2S1 stuff to I2S0 (in the file esp32_i2s_parallel.c).

Unfortunately, this does not work. Although the initialization completes successfully and the i2s_isr gets called regularly (I’ve tested it with my Scope by toggling an unused GPIO), absolutely nothing appears on the output pins connected to the LED-Matrix.

Here’s a dump of the Comm-Port:
ESP-ROM:esp32s2-rc4-20191025
Build:Oct 25 2019
rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3ffe6100,len:0x8
load:0x3ffe6108,len:0x570
load:0x4004c000,len:0x1620
load:0x40050000,len:0x1a50
entry 0x4004c27c
Starting SmartMatrix Mallocs
Heap/32-bit Memory Available: 229188 bytes total, 190308 bytes largest free block
8-bit/DMA Memory Available : 229188 bytes total, 190308 bytes largest free block
SmartMatrix Layers Allocated from Heap:
Heap/32-bit Memory Available: 224080 bytes total, 186576 bytes largest free block
Starting SmartMatrix DMA Mallocs
sizeof framestruct: 00001800
DMA Memory Available before ptr1 alloc: 211344 bytes total, 186160 bytes largest free block
matrixUpdateFrames[0] pointer: 3FFC7520
DMA Memory Available before ptr2 alloc: 211344 bytes total, 186160 bytes largest free block
matrixUpdateFrames[1] pointer: 3FFC8D30
Frame Structs Allocated from Heap:
Heap/32-bit Memory Available: 211344 bytes total, 186160 bytes largest free block
8-bit/DMA Memory Available : 211344 bytes total, 186160 bytes largest free block
Allocating refresh buffer:
lsbMsbTransitionBit of 0 requires 393216 RAM, 186160 available, leaving -207056 free:
lsbMsbTransitionBit of 1 requires 196608 RAM, 186160 available, leaving -10448 free:
lsbMsbTransitionBit of 2 requires 98304 RAM, 186160 available, leaving 87856 free:
Raised lsbMsbTransitionBit to 2/11 to fit in RAM
lsbMsbTransitionBit of 2 gives 76 Hz refresh, 120 requested:
lsbMsbTransitionBit of 3 gives 151 Hz refresh, 120 requested:
Raised lsbMsbTransitionBit to 3/11 to meet minimum refresh rate
Descriptors for lsbMsbTransitionBit 3/11 with 8 rows require 49152 bytes of DMA RAM
SmartMatrix Mallocs Complete
Heap/32-bit Memory Available: 162160 bytes total, 136976 bytes largest free block
8-bit/DMA Memory Available : 162160 bytes total, 136976 bytes largest free block
Setting up parallel I2S bus at I2S0 (modified)
config sig_data_base ok
route signals ok
power on dev ok
init i2s dev ok
I2S setup done.

Do you have an idea what could cause this behavior?
I would really appreciate it, if we can get it working on the ESP32-S2!

Here is my example code (the modified SmartMatrix library is integrated in the sketch folder):
ESP32_S2_FeatureDemo.zip

The ESP32-S2 core libraries can be downloaded by selecting the esp32s2-branch here:

Florian

I only took a quick look at your code, but it looks like you missed some of the I2S1 references:

    REG_WRITE(I2S_INT_CLR_REG(1), (REG_READ(I2S_INT_RAW_REG(1)) & 0xffffffc0) | 0x3f);

I’m pretty sure that’s accessing I2S1 registers there. I saw a few more lines like this. Sorry it’s not easy to change I2S peripherals, that’s something Sprite_TM’s example code didn’t handle well, and I didn’t bother improving as I figured there would always be two peripherals so why bother.